Akademik Veri Yönetim Sistemi
37th IEEE International Conference on Microelectronic Test Structures, ICMTS 2025, Texas, Amerika Birleşik Devletleri, 24 - 27 Mart 2024, (Tam Metin Bildiri)
The electrical characterization of semiconductor devices plays an important role in guiding the research on experimental architectures and evaluating the performance of devices. However, testing all the fabricated devices is an exhaustive process, which has become almost impossible due to time and resource constraints. This paper introduces a new way to perform electrical characterization that leverages a combination of Gaussian Process Regression (GPR) and Active Sampling (AS) techniques. The proposed methodology dynamically selects key gate voltages and artificially reconstructs a complete Id-Vg curve to significantly reduce the time required for characterization. The value of the proposed method was verified through a diverse dataset of 5000 N and P MOS devices, including FinFET and CFET architectures under various device design and process variations. We experimentally demonstrate that our approach achieves a reduction in the number of measurements by a factor of three to seven while maintaining a threshold voltage accuracy within a 19 mV error and a subthreshold slope error of 6 mV/dec.